There is a metal oxide semiconductor field effect transistor (MOSFET) having a super junction structure (hereinafter also referred to as “SJ structure”) in which an n-type region and a p-type region are alternately arranged in a semiconductor layer. The MOSFET having the SC structure achieves both high breakdown voltage and low on-resistance. In the SJ structure, an n-type impurity amount contained in the n-type region and a p-type impurity amount contained in the p-type region are made equal to create a pseudo non-doped region to realize the high breakdown voltage. At the same time, the impurity concentration of the n-type region can be made high, and thus the low on-resistance can be realized.
However, in the MOSFET having the SJ structure, electromagnetic wave noise at the time of a switching operation may be increased. When the n-type region and the p-type region are rapidly depleted at the time of turning off the MOSFET, a drain-source capacitance (Cds) and a gate-drain capacitance (Cgd) are rapidly decreased. Therefore, a temporal change amount (dv/dt) of a drain voltage and a temporal change amount (di/dt) of a drain current become large. As a result, counter electromotive force due to parasitic inductance and a displacement current due to parasitic capacitance are generated, and a gate-source voltage oscillates. The electromagnetic wave noise at the time of a switching operation is increased due to the oscillation of the gate-source voltage.
If the electromagnetic wave noise at the time of a switching operation is increased, electronic devices and the human body around the MOSFET may be adversely affected. Therefore, suppression of the electromagnetic wave noise at the time of a switching operation of the MOSFET having the SJ structure is required